Using an FPGA to Accelerate Iris Recognition
نویسندگان
چکیده
:Iris recognition becomes one of the most accurate and secures biometric method used today. The execution time of the iris recognition algorithm on general purpose sequential system as central processing unit is too high, so it cannot work in the real time applications. In this paper, an enhancement for the iris recognition system was applied for each processing part to speed up the execution time and make the opportunity to work in real time applications. Two enhancements were made in this paper, the first one by using hardware implementation for all the iris recognition process which are: Segmentation, Normalization, Feature extraction, and Hamming distance using the FPGA. The second enhancement is by choosing a small part (quarter) from the iris region which contains sufficient features to make the recognition, hence reducing the processing time.
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